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Now is a good time to be optimistic about RISC-V. The continued push for open-source hardware is gaining momentum with the growth of the Internet of Things (IoT) and Industrial Internet of Things (IIoT) markets.

RISC-V is the abbreviation for reduced instruction set computer. The V stands for fifth-generation design in Roman numerals. It's an open specification for an Instruction Set Architecture (ISA)—an approach that eliminates the need to learn and create unique development ecosystems for each processor's architecture. In addition to being scalable, replicable, configurable, and using fewer instructions, RISC-V hardware is also royalty-free.

This RISC-V instruction set has given design engineers a solid basis for system design with a standard core and standard or custom extensions using a field-programmable gate array (FPGA). The instruction set is both open and frozen, and processor designs will continue to work well while RISC-V evolves.

RISC-V began as a research project at the University of California Berkeley's Parallel Computing Laboratory in 2010. In 2011, the first RISC-V chip was prototyped. From there, RISC-V gained momentum and 36 companies founded the RISC-V Foundation, which, in 2020, became RISC-V International.

In its introductory presentation, RISC-V International predicted that 50 billion IoT devices would be on the market by 2030. RISC-V also cites a 2020 study that determined about 23 percent of ASIC and FPGA projects incorporated at least one RISC-V processor.

In this week's New Tech Tuesday, we'll look at new products in the RISC-V ecosystem from IAR Systems, Espressif Systems, and DFRobot.

IAR Systems I-jet^® Trace for RISC-V has extensive debugging and trace functionality for RISC-V devices. The I-jet is a trace interface based on the draft RISC-V Nexus Trace Specification. Developers will appreciate that the I-jet Trace and IAR Embedded Workbench^® enable them to have full control of all active settings and the application's live trace status. Also, the IRA Embedded Workbench is a complete software toolchain where developers can see everything they need in a single view. Function profiling makes it possible to see and analyze timing information for the functions in an application. Code coverage analysis shows the percentage of code that has been executed down to a single instruction resolution.

Espressif Systems ESP32­C3 Ultra-Low Power SoCs are ideal for various scenarios and complex applications based on a rich set of peripheral interfaces and general-purpose input/outputs (GPIOs). The ESP32-CA are ultra-low-power and highly integrated MCU-based System-on-Chip solutions, supporting 2.4GHz Wi-Fi^® and BLUETOOTH^® Low Energy. The SoC has applications in smart homes, industrial automation, health care, consumer electronics, smart agriculture, retail and catering, and audio devices.

The DFRobot Maix Go and Bit AI Development Kit covers a lot of ground with several key pieces. The kit features a K210 controller chip with AI and MicroPython support. The kit also comes with a dual-core processor chip with an independent floating-point unit (FPU), 64 bits central processing unit bit-width, 8MB on-chip SRAM, 400 adjustable nominal-frequency, and a double-precision FPU. The Bit AI kit and board integrate an on-board 128Mb high-speed and large-capacity flash, high-speed USB to serial port chip CH552, RGB LED, micro-electromechanical system (MEMS) microphone, 24-pin digital video port (DVP) camera interface, and 24-pin 8-bit MCU LCD interface. The Maix Go kit includes an on-board accelerometer MSA300, and an audio encoding chip.

The aim is for silicon developers to implement an instruction set that is simpler to use and easier to understand, so they don't have to create everything from scratch. As an open-source ISA, RISC-V hardware offers developers an incredible amount of freedom for endless customization and innovative design.